Let's know about DDR2 SDRAM (John B. Emmerson III)
Jan 18, 2010
DDR2 SDRAM is a dual data rate synchronous dynamic random access memory interface. It supersedes the original DDR SDRAM specification and the two are not well-matched.In addition to double pumping the data bus as in DDR SDRAM, DDR2 provides an I/O buffer among the memory and the data bus so that the data bus can be run at twice the speed of the memory clock. The two factors combine to achieve a total of 4 data transfers per memory clock cycle.
Because the memory clock operates at half the external data bus clock rate, DDR2 memory operating at the same external data bus clock rate as DDR will provide the same bandwidth but with upper latency, resulting in inferior performance.The best-rated DDR2 memory modules are at least twice as fast as the best-rated DDR memory modules.
Like all SDRAM implementations, DDR2 stores memory in memory cells that are activated with the use of a clock signal to synchronize their operation with an external data bus. Like DDR before it, DDR2 cells transfer data both on the increasing and falling edge of the clock. The main difference between DDR and DDR2 is that in DDR2 the bus is clocked at twice the rate of the memory cells, so four bits of data can be transferred per memory cell cycle.
DDR2's bus frequency is boosted by electrical interface improvements, on-die termination, prefetch buffers and off-chip drivers. However, latency is significantly increased as a trade-off. The DDR2 prefetch buffer is 4 bits deep, whereas it is 2 bits deep for DDR and 8 bits deep for DDR3.
Another cost of the increased bandwidth is the requirement that the chips are packaged in a more expensive and more hard to accumulate BGA package as compared to the TSSOP package of the previous memory generations as like DDR SDRAM and SDR SDRAM. This packaging transformation was essential to keep up signal integrity at higher bandwidths.
About the AuthorPersonally I always prefer to buy DDR SDRAM,DDR - PC2100 ECC,DDR - PC2700 etc from online shops..